I have three interrupts defined. One for DMA, one for PIT, and one for I2C.
The I2C uses the master operation in transactional mode. It uses the I2C_MasterTransferCreateHandle to install the interrupt and uses I2C_MasterTransferNonBlocking to access data.
Both the PIT and DMA use the CMSIS interrupts, i.e. default interrupt names (like in the examples).
The DMA is triggered by a TPM and runs continuously feeding data to a DAC. It works perfectly.
The PIT works perfectly.
The I2C work perfectly by itself, or with PIT interrupts engaged. Even adding a long delay in the PIT routine still allows the the I2C to function.
However, once I engage the TPM to drive the DMA, I2C fails to read the data on the I2C bus correctly. It has very sporadic behavior as seen with a logic analyzer.
The DMA handler only uses 12% of the CPU resources, so there is plenty of time for the PIT and I2C to function. DMA has the the highest interrupt level 0. The PIT has level 1, and the I2C has level2, the lowest.
The only thing I can think is that the I2C uses the transactional method where it must travel through more software layers. Or something in the DMA is causing problems.
I've had no problems like this use PE Device Init on both a K22 and a KL25.
What is wrong with the SDK? Any ideas?