Hi Toshishisa,
ACCESS_SIZE defines the amount of DI clock cycles that a pixel is valid on the bus. When generic data is sent, this field defines the amount of cycles that the generic data is valid on the bus. This field defines the amount of IPU cycles between any 2 accesses (an access may be a pixel or generic data that may have more one component)
The COMPONNENT_SIZE field defines the amount of cycles that each component is valid on the bus. The COMPONNENT_SIZE is always smaller or equal to ACCESS_SIZE. For synchronous interface COMPONNENT_SIZE is always equal to ACCESS_SIZE. In case that there's a need for some gap between one type of accesses to another having the COMPONNENT_SIZE smaller than ACCESS_SIZE can be useful (for example read after write accesses that require some gap between them). This field defines the amount of IPU cycles between any 2 components
Regards
Hi, Bio_TICFSL,
Thank you for the answer, but I have a question.
For example, LCD active data is pixel 800Hx600V 24bit RGB888, but LCD clock is 850x 650 including V and H.
The value is max 255. How these value define?
1. Does access size means 1x32bit per a pixel and max 255 x32bit pixels? Does it means burst size?
2. Does component size means a gap cycle of any two access data size? Or does component size means access size + gap cycle?
Best Regards,
Sugiyama