We are using A0 version and program it to fit LPDDR3 application by myself. Now, we are planing to use A2 version but we are not sure what is the SW2 (1.8V) and SW3 (1.2V) DVS clk setting. We want to support the rising time higher than 100uS so we set the DVS clk to be 6.25mV/us. Do you help to check it?
And, if the setting is 12.5mV/us, the only way for us is to use A0 version and find 3rd part help to program it for mass production?