Hi,
I have a code where bulk transfer is triggered through SRAM pass through mode with FAST_READ/FAST_WRITE(Microcontroller -> NTAG I2C plus -> Reader). I am thinking to add "end-to-end data integrity check" (where ACK/NACK will be sent from Reader --> NTAG I2C plus --> Microcontroller):
CRC per 64-byte block
a. Add CRC to 64-byte block. Transfer data to tag using I2C
b. Read 64-bytes through NFC interface
c. Send ACK/NACK from NFC to I2C through SRAM
[DATA (62 bytes + 2 byte crc)] Microcontroller --> NTAG I2C plus --> Reader
[ACK/NACK] Reader --> NTAG I2C plus --> Microcontroller
Few questions:
1. Is this "end-to-end data integrity check" needed or "Data integrity" available in section 8.2.1 of NT3H2111_2211.pdf will be sufficient?
2. Is it possible for a retry mechanism with the "Data integrity" supported by NTAG I2C plus.
Solved! Go to Solution.
Hi Arul Christopher John Britto,
I have answered your questions in the case you submitted, and we may continue the discussion there.
Have a great day,
Kan
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------
Hi Arul Christopher John Britto,
I have answered your questions in the case you submitted, and we may continue the discussion there.
Have a great day,
Kan
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------