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NTAG I2C plus - End to end data integrity with SRAM pass-through mode

Question asked by Arul Christopher John Britto on Dec 22, 2017
Latest reply on Jan 2, 2018 by Kan_Li



I have a code where bulk transfer is triggered through SRAM pass through mode with FAST_READ/FAST_WRITE(Microcontroller -> NTAG I2C plus -> Reader). I am thinking to add "end-to-end data integrity check" (where ACK/NACK will be sent from Reader --> NTAG I2C plus --> Microcontroller):

CRC per 64-byte block

   a. Add CRC to 64-byte block. Transfer data to tag using I2C

   b. Read 64-bytes through NFC interface

   c. Send ACK/NACK from NFC to I2C through SRAM


[DATA (62 bytes + 2 byte crc)]   Microcontroller --> NTAG I2C plus --> Reader

[ACK/NACK]   Reader --> NTAG I2C plus --> Microcontroller


Few questions:

1. Is this "end-to-end data integrity check" needed or "Data integrity" available in section 8.2.1 of NT3H2111_2211.pdf will be sufficient?

2. Is it possible for a retry mechanism with the "Data integrity" supported by NTAG I2C plus.