I have a question of di0_sync_count_sel bit in IPUx_DI0_GENERAL register.
It described that 'For synchronous flow error: selects synchronous flow synchronization counter in DI:'
What is is this synchronization counter? Is it one of counter #0 to #8 in DI?
If so, How to chose the counter? IS it like, if DISP clock would like to stop, chose counter #0, or if Hsync would like to stop, chose counter#2?