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IMX7 Dual and solo - RAM porting in u-boot

Question asked by Gopinath Srinivasan on Dec 19, 2017
Latest reply on Dec 19, 2017 by igorpadykov

Hello All,

 

I am working on porting two custom boards which uses IMX7 dual and solo with LPDDR3. I am following i.MX7D DRAM Register Programming Aid document for porting u-boot for LPDDR3. I have downloaded MX7D_LPDDR3_register_programming_aid_v1_4.xlsx document and configured the settings from my DRAM data sheets. Now I have the updated dstream.ds file.

 

Now below are my questions. 

1. u-boot requires imximage.cfg as DCD structure for DRAM configuration. How to port this file (imximage.cfg) from dstream.ds file? Any tools available ? or I need to do it manually? 

 

2. It seems MX7D_LPDDR3_register_programming_aid_v1_4.xlsx file is only for IMX7 Dual.(not sure). Why because when I referred warp7 development board which uses  IMX7 solo, the imximage.cfg address values are different. For example, please refer difference between dual and solo cfg files. But when I checked the .ds file all the addresses are matching with IMX7 dual cfg files from sabreSD.  So shall I use the same programming aid tool for solo ? or do I need a different one?

 

IMX7 Dual cfg file from SabreSD

 

/*
* Device Configuration Data (DCD)
*
* Each entry must have the format:
* Addr-type Address Value
*
* where:
* Addr-type register length (1,2 or 4 bytes)
* Address absolute address of the register
* value value to be stored in the register
*/

DATA 4 0x30340004 0x4F400005
/* Clear then set bit30 to ensure exit from DDR retention */
DATA 4 0x30360388 0x40000000
DATA 4 0x30360384 0x40000000

DATA 4 0x30391000 0x00000002
DATA 4 0x307a0000 0x01040001
DATA 4 0x307a01a0 0x80400003
DATA 4 0x307a01a4 0x00100020
DATA 4 0x307a01a8 0x80100004
............

DATA 4 0x307900c0 0x0e407304


DATA 4 0x30384130 0x00000000
DATA 4 0x30340020 0x00000178
DATA 4 0x30384130 0x00000002
DATA 4 0x30790018 0x0000000f

CHECK_BITS_SET 4 0x307a0004 0x

#endif

 

In case of warp7 board (IMX7 Solo)

/*
* Device Configuration Data (DCD)
*
* Each entry must have the format:
* Addr-type Address Value
*
* where:
* Addr-type register length (1,2 or 4 bytes)
* Address absolute address of the register
* value value to be stored in the register
*/
DATA 4 0x020c4018 0x00260324

DATA 4 0x020c4068 0xffffffff
DATA 4 0x020c406c 0xffffffff
DATA 4 0x020c4070 0xffffffff
DATA 4 0x020c4074 0xffffffff
DATA 4 0x020c4078 0xffffffff
DATA 4 0x020c407c 0xffffffff
DATA 4 0x020c4080 0xffffffff

DATA 4 0x020e0344 0x00003030
DATA 4 0x020e0348 0x00003030
DATA 4 0x020e034c 0x00003030
DATA 4 0x020e0350 0x00003030
DATA 4 0x020e030c 0x00000030

 

DATA 4 0x021b0004 0x00025564
DATA 4 0x021b0404 0x00011006
DATA 4 0x021b001c 0x0000000

 

Please give me your valuable suggestions.

 

Regards,

Gopinath S

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