Bit field description of CCM_CLPCR register on IMX6DQRM is missed.

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Bit field description of CCM_CLPCR register on IMX6DQRM is missed.

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takayuki_ishii
Contributor IV

Hello community,

In Reference Manual of i.MX6Dual/Quad(IMX6DQRM.pdf) rev 4 09/2017, 

It was modified CCM_CLPCR register field descriptions from IMX6DQRM.pdf rev3 07/2015.

But it seems some mistake, 

1) Allocate same bit (bit 21) of following register bits.

  * BYPASS_LPM_HS0

  * BYPASS_MMDC_CH1_LPM_HS

 2) Allocate same bit (bit19) of following register bits.

  * BYPASS_LPM_HS1

  * BYPASS_MMDC_CH0_LPM_HS

 3) Why it has no description in B.1.19 CCM Revision History?

I checked a IMX6Solo/DualLite reference manual(IMX6SDLRM.pdf) rev3 and it have same problem.

Please suggest a correct field of this register.

Best regards,

Ishii.

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art
NXP Employee
NXP Employee

Yes, you are right, there is the error in the CCM_CLPCR register description in the i.MX6Dual/Quad Reference Manual Rev.4 document. The correct CCM_CLPCR bit fields description is given in the Rev.3 document.


Have a great day,
Artur

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art
NXP Employee
NXP Employee

Yes, you are right, there is the error in the CCM_CLPCR register description in the i.MX6Dual/Quad Reference Manual Rev.4 document. The correct CCM_CLPCR bit fields description is given in the Rev.3 document.


Have a great day,
Artur

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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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takayuki_ishii
Contributor IV

Hello Artur

Thank you for your response.

I will use a rev3 codument.

Best regards,

Ishii.

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