The LS1012A RDB reference manual outlines 2 possible sources for the PCIe reference clock: PCIE_CLK and SD1_TX_CLK. In both cases, the reference clock is an *output* from the board, which means (IIUC) these configurations apply only to the case in which the PCIe is used in RC mode. In EP mode, the reference clock would be an *input*. Correct? If so, where are the relevant PCIe configurations documented? Is there no way to route an externally-provided reference clock to the LS1012A's PCIe controller?
In the EP case the PCIe reference clock is provided from an external source (either by a generator or PCIe RC device), thus the LS1012A should not be specifically configured in this case.
> Is there no way to route an externally-provided reference clock to the LS1012A's PCIe controller?
If this question is about the LS1012ARDB, then there is no way.