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Doubts in ECC error injection using EIM in MPC5777c example

Question asked by veerendranath jakkam on Dec 6, 2017
Latest reply on Dec 7, 2017 by David Tosenovjan

Hi,

 

Example MPC5777C-1b+2b_RAM_ECC_error_injection GHS614 

I am referring the code in above example to implement Error injection code..

Please provide below info..
1. Is mandatory to have test address aligned to 8 bytes? Why?

2. In example code after configuring EIM, Read operation is used to generate the ECC error. can we use write operation? How it will differ?

3. How error injection will differ when I use 32-bit read/write compared to 64-bit read/write when test address not aligned to 8 bytes?

 

Regards,

Veeru

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