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i.MX7D Sabre: how to assert the PMIC standby signal in Deep Sleep Mode?

Question asked by Vijay Raisinghani on Dec 6, 2017
Latest reply on Jan 22, 2018 by Vijay Raisinghani

I am working on the i.MX7D Sabre reference board, trying to get the PMIC_STBY_REQ signal to assert to the PMIC when my suspend sequence is initiated. My suspend process programs the GPC/SMC controller to bring the A7 cores into STOP mode and the rest of the system into DSM; however, when WFI is executed and the SMC is doing its power down sequence, the PMIC_STBY_REQ signal is never asserted to the PMIC.

 

 

The GPC has been programmed to put both cores into STOP mode, DSM is enabled, VSTBY is enabled, and the power down sequence is programmed for CORE0/Mega-Fast Mix/SCU in Slot 0-2. The caches are then flushed and disabled, the memory is put into self-refresh, and then WFI is executed. According to the TRM, the PMIC_STBY_REQ signal should be asserted, but it is not for me. My suspend code loosely mimics the Linux kernel's suspend code.

 

Are there any other settings other than configuring the GPC/PGC and then entering DSM required in order for the CCM to assert the PMIC_STBY_REQ signal? For example, is it required that all of the peripheral clocks be gated, is it required for the M4 to be idle, is it required for the oscillator to be powered off, etc?

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