I want to ask about the pin assignment.
I refer to IMX6ULLRM Rev. 1, 11/2017.
It is described at P4099 Table 60-1. XTALOSC External Signals.
I think that XTALOSC_REF_CLK_32K can be assigned to GPIO1_IO03(ALT3).
On the other hand, it seems that we cannot select ALT3 with SW_MUX_CTL[MUX_MODE].
P1571 32.6.10 SW_MUX_CTL_PAD_GPIO1_IO03 SW MUX Control
How can I allocate XTALOSC_REF_CLK_32K to GPIO1_IO03?