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LS1021 core freez on outbound pcie read

Question asked by Artem Epishkin on Nov 28, 2017
Latest reply on Jan 14, 2018 by Yiping Wang


We have our custom LS1021 board (running Linux) connected via PCIe link with an endpoint device. Data transfers work fine in general but there are problems in one particular situation. Any outbound non-posted read request from RC (LS1021) to EP freezes the cpu core (which issued the request) if the PCIe link is down or goes down (simulated by reseting the EP in our case). If and when the link comes back up, LS core unfreezes and continues to execute code. Our issue seems to be related with the ones in this unresolved topic


We have the following questions:

1. Is it an expected behavior from the PCIe block of LS1021?

2. Is the completion timeout mechanism implemented in LS1021? Is it possible to generate an interrupt when it is detected?

3. How can we handle and recover from a "stuck" read request to a link in a down state?

4. What is the purpose of the "reserved" IRQ lines numbered 177(209) and 178(210) in the kernel/Documentation/devicetree/bindings/pci/layerscape-pci.txt file?