This discussion is related to T1042 to get understanding about its addressing algorithm. For Example core e5500 generate some address to request a data. This address is compared in LAW (Local Access Window) which give responsibility to some memory controllers to handle this transaction on the basis of target id. Now we have to discuss that
what type of address these Memory controllers recieve
how they decode this address and decide which chip select should be enabled
what base address should be selected in for different chip select registers For Example (in case of IFC values of IFC_CSPRn_EXT and IFC_CSPRn ).
We have to focus on IFC controller.