Thanks for your clear and prompt answer to my question about table 64 in the FXOS8700CQ data sheet. Could you further elaborate the signal flow when the high pass filter is enabled? In particular, I'm interested in correctly utilizing the vector magnitude configuration, so that is the specific mode I'm asking about. For example, is the filter implemented in the early analog stages, in the DSP, before or after the squaring operation, the offset subtraction, etc. A block diagram, or a signal flow diagram, showing the relevant software-controlled variable parameters, or even a comprehensive narrative tracing the signal from the source through the vector amplitude limit detector, would be most helpful. Do you have anything along these lines you can share?
Thank you for your assistance,