Dear NXP Team,
We are using IMX6Q SoC in our custom product where we connected IMX6 FEC to one of the port of the Ethernet switch from Marvell. Reference clock for the i.MX6 can be configure either from external oscillator (125Mhz) or via Marvell Port-6 GPIO-5. Both ports (i.MX6 and Marvell (Port-6) switch) working at 2.5V.
We are having CRC error lost at RX side of the i.MX6 with 1G configuration. We tried to change clock TX and RX timing via Marvell Physical Control register without any success. So we want to play with RGMII Rx on FEC of IMX6
I saw in IMX6Q data sheet and found of page#90 Figure 55: RGMII Receive Signal Timing Diagram with Internal Delay
See below image:
Where do I find this configurations?
I checked IMX6DQRM_Processor Reference Manual.pdf but I didn't found this configurations.