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Question about a MPC8270 processor in PowerQuicc II series

Question asked by Han-jin Jang on Nov 25, 2017
Latest reply on Dec 4, 2017 by alexander.yakovlev

The reference figure on datasheet, MPC8272EC/Rev.3/figure 6, shows that the data is doing a transit at rising edge and is sampled at falling edge.
But the result of our experiment seems that the RX data sampling was performed at rising edge.


My system is configured to followings;
 1) MPC8270, SCC, HDLC, NRZ coding
 2) Receive Data sampling using internal clock


 1) Default RX sampling edge when SCC uses a internal clock
 2) Concrete method to select a RX sampling edge
    On datasheet, It seems that a sampling edge with respect to RX data can be arbitrarily changed


I hope your solutions sincerely.

Thank you