Reg. MPC8270 - Ethernet Send and Receive of 1000 packets

[rvijay435]

Requirement:

To fill the data of 1000 packets with each packet of 1500 bytes. Transmit all the 1000 packets in a loop by configuring all the required registers and setting the R-bit (Ready) in the TXBD. After this receive all the 1000 packets using the RXBD status.

Procedure:

We are using MPC8270. The IMM_BASE_ADDR is defined as 0xF0000000. The issue is with respect to the Buffer Descriptor configuration. We have used the DPRAM location for configuring the Buffer Descriptors with the starting addresses as 0xF00080B0 for Receive Buffer Descriptors.

                And for the Transmit Buffer Descriptors, the address is calculated as ((0xF00080B0 + (BUF_DES_SIZE*NUM_SCC_TXBD))).

Note:

BUF_DES_SIZE = 8

NUM_SCC_TXBD = 50. Limited to 50, because if we did more than 50, the system is hanging while trying to send and receive data.

Now how can we achieve the 1000 packet transmission and reception. The questions I have are:

1. Is it practically possible to send 1000 packets and then receive 1000 packets? (Hope it is because, I was able to do this for 50 packets).
2. Does the Address for the TXBD and RXBD need to be changed? If so, what address can be used? We changed multiple addresses but couldn’t get the work done.
3. If the addresses are changed for TXBD and RXBD, do we have to change the IMM Base Address as well? Also do we have to change any other addresses corresponding to this?

[alexander_yakov]

You said: "We have used the DPRAM location for configuring the Buffer Descriptors"

This is incorrect, buffer descriptors must be placed in system memory. This is somehow mentioned in Section 30.6 of MPC8280 Reference Manual.

As long as system memory size is quite big, I do not see anything wrong in allocating all 1000 buffers and their buffer descriptors at once, and than run a transmission of whole bulk of buffers.

To answer your questions:

1. Yes, you can process buffer descriptors "on the fly", if you configure your FCC to generate interrupts on each buffer descriptor and do necessary processing by main core in interrupt handler. This is practical for continuous traffic, or when you do not have enough memory for buffers and buffer descriptors and have to re-use it.

2. Addreses of TxBD and RxBD buffer descriptor tables does not need to be changed. Entries in TxBD and RxBD buffer descriptor tables - can be changed, if particular buffer is not in use by FCC.

3. IMM does not need to be changed. This defines an offset for all internal memory mapped registers and memory structures of the processor. This parameter is typically changed only once, at system startup. Changing this parameter on working system is very tricky, I do not recommend doing that.

Have a great day,
Alexander
TIC

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
----------------------------------------------------------------------------------------------------------------------