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C55 Flash Driver Problem

Question asked by whoam on Nov 22, 2017
Latest reply on Dec 19, 2017 by whoam

Hi all,

I'm building my own external tool to flash the MPC5775K with the help of this application note https://www.nxp.com/docs/en/application-note/AN4365.pdf 
Most of the things work, but I still have one major issue/problem when using the FlashProgram/FlashCheckStatus function: 


When I'm flashing just the programmable size of 0x80 with FlashProgram the process works fine. But if i try to flash the size 0x400 it doesn't work like it should. It's just flashing the size of 0x100 and the return value of the FlashCheckStatus is 0x00000000 instead of C55_INPROGRESS. When I check the CtxData after the FlashCheckStatus it is returning 0xF9C100 (F9C000 is dest address) and also the size is now 0x300, so it stored the correct data there.

I wrote the SRAM start address of the FlashProgramm Driver into pReqCompletionFn of CONTEXT_DATA. Do I have to do anything else?
(When using the CheckStatus function with FlashErase it is working fine and returns C55_INPROGRESS)
This is my code of the Flash Part if it's helping:

/* write address of Flash Program to ctxData->pReqCompletionFn to enable multiple programming of programmable size*/

WriteWord(C55_pReqCompletionFn, C55_Addr_FlashProgram);
returnCode = FlashProgram(&ssdConfig, FALSE, 0x00F9C000, 1024, data2program, &ctxData);
if (returnCode == C55_OK)

{

   //Wait until the operation finishes

   while ((returnCode = FlashCheckStatus(&ssdConfig, C55_MODE_OP_PROGRAM, &opResult, &ctxData)) == C55_INPROGRESS);
}
 
This is the routine of the FlashProgramm fucntion:
  1. write source data into SRAM at SourceStart
  2. Set r1 as the stack pointer
  3. Set r3 to point to the SSD_CONFIG structure in internal SRAM
  4. Set r4 with the factoyPgmFlag value
  5. Set r5 to point to the destination address to be programmed in flash memory
  6. Set r6 to the size of the data in bytes to be programmed to flash memory
  7. Set r7 to point to SOurceSTart
  8. Set r8 to point to the address where CtxData is in SRAM
  9. Start with FLashProgram address-0x4
  10. Check for Debug mode re-entering
  11. Read r3.

 

This is the routine of the FlashCheckStatus fucntion:
  1. Set r1 as the stack pointer
  2. Set r3 to point to the SSD_CONFIG structure in internal SRAM
  3. Set r4 with the modeOp value
  4. Set r5 to point to the address where opResult should be stored
  5. Set r6 to point to the address where CtxData is stored in SRAM
  6. Start with FlashCheckStatus address-0x4
  7. Check for Debug mode re-entering
  8. Read r3.
  9. Read opResult value from SRAM

 

Would be really grateful for any kind of help there.

 

Regards and thanks in advance

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