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LS1021A 1588 for Packet Generation and Parsing

Question asked by Bengisu Tengilimoglu on Nov 16, 2017
Latest reply on Nov 23, 2017 by Serguei Podiatchev

Hi,

 

I want to design a board with 1588 support. I use LS1021A with ethernet transceiver with a 1588 time stamping support. In this case, it is my understanding that LS1021A has to do only 1588 packet generation and parsing. In the reference manual, it is stated that 1588 registers are in eTEC1 memory space. Like my case when you do not need to timestamp 1588 packets in LS1021A, it is still necessary to enable eTEC1?1588 registers are only timestamp related or they are also necessary for 1588 packet issues? In my case because of IO muxing, I wan to use only eTEC2 & 3.

 

Thanks for any help.

 

Regards,

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