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KL28 SIRC power consumption abnormal

Question asked by Liangliang Ma on Nov 14, 2017
Latest reply on Nov 16, 2017 by Liangliang Ma

Here is the situation, we are testing the KL28 power consumption on a board with only MCU, 10k ohm reset pull up register and VDD3.3V capacitor. The code does nothing but initialize the system clock and goes to VLPS mode in a dead loop. SIRC is enabled at 8MHz. FIRC, SOSC and SPLL are disabled. Every thing else on the board is at reset state. With SIRC disabled in low power stop mode the average current is 4.7uA as expected. But when SIRC enabled in low power stop mode the current increases to 200uA, it seems that SIRC costs near 200uA, several times higher than the number in the datasheet.

 

Is there any clue about this?

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