question about workaround for P2010 DDR errata A-004508

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question about workaround for P2010 DDR errata A-004508

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zy_mooncity
Contributor III

Hi folks,

I'm working on a vxWorks bsp based on P2010, and I'm try to implement the workaround for errata A-004508 of DDR controller. The workaround for errata A-004508 described in P2020CE_RevCC.pdf as the following:

Workaround: When the DDR controller is initialized below a junction temperature of 0°C and then operated
above a junction temperature of 65°C without a reset, then software should set bit 22 at the
CCSR register offset 0x0_2F08 before the DDR controller is enabled. This ensures the DDR
controller operates across the full, supported industrial temperature range.

My question is:

   Since it's hard for the software to judge both the initialized temperature and the operation temperature of DDR controller, can the software implement the workaround without judge the temperature condition? In other word, can I implement the workaround unconditionally?

Thanks and Regards

Yun

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4 Replies

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stefanvranken
Contributor II

Hello,

Can you  provide this chip errata  document via this community: P2020CE_RevCC.pdf.   I don't find it on nxp website.

Thanks,

Stefan 

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371 Views
ufedor
NXP Employee
NXP Employee

The errata document is confidential and can be provided through a Technical Case:

https://community.freescale.com/thread/381898

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ufedor
NXP Employee
NXP Employee

Yes, the workaround can be implemented unconditionally.

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zy_mooncity
Contributor III

Thanks for the confirmation.

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