can we supply the IC with 27MHz CMOS clock from a pll instead of using xtal?
It is possible to supply the IC with 27 MHz CMOS clock instead of using XTAL, ONLY IF the clock meets the requirements below:
The external clock input must have low jitter. This is because it is used as time reference for the output video clock.
1. The quality of this clock is a major contributor for the video output quality
2. DO NOT use Spread-spectrum Clock for this clock source
3. The clock must be applied after supply rise and PTN3392 will not startup until this clock is present. If the clock is not started PTN will not boot and keep HPD signal LOW (implementation is SW)
4. The clock must start reliably with a transition time from OFF to ON within 100 us
The Maximum Time Interval Error measured over a 100 us period that gives the best quality measure for a reference clock to be used for VGA pixel clock recover. 100 us is a period in which the output video needs to progress with a few lines while the clock phase is transferred only once per line to the monitor at the rising edge of the HSync signal. Any clock timing error within this period is directly transferred to the monitor video sampling phase error.
External clock input signal amplitude - Vosc_in(slave) : min 1.0 Vpp max 1.5 Vpp
External clock input allowed maximum Time Interval Error (single side peak value) – TIEosc_in(slave) : min -40 ps max 40 ps. Test condition: TIE period: 100 us, TIE BW: 5 MHz.
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