AnsweredAssumed Answered

U-boot loading fails on LS2088

Question asked by Vijaykumar Desai on Oct 30, 2017
Latest reply on Nov 2, 2017 by Vijaykumar Desai

When I powerup the LS2088 board, I get an error from the U-boot as described below.

I use the default u-boot available in the board.


Can someone help me understand what the issue is?

 

U-Boot 2016.01LS2088A-SDK+g1179f5b (Dec 21 2016 - 21:23:49 +0800)

SoC: LS2088E Version:1.0 (0x87090010)
Clock Configuration:
CPU0(A72):1800 MHz CPU1(A72):1800 MHz CPU2(A72):1800 MHz
CPU3(A72):1800 MHz CPU4(A72):1800 MHz CPU5(A72):1800 MHz
CPU6(A72):1800 MHz CPU7(A72):1800 MHz
Bus: 700 MHz DDR: 1866.667 MT/s DP-DDR: 1600 MT/s
Reset Configuration Word (RCW):
00000000: 483038b8 48480048 00000000 00000000
00000010: 00000000 00000000 00a00000 00000000
00000020: 01001180 00002581 00000000 00000000
00000030: 00000c0b 00000000 00000000 00000000
00000040: 00000000 00000000 00000000 00000000
00000050: 00000000 00000000 00000000 00000000
00000060: 00000000 00000000 00027000 00000000
00000070: 412a0000 00000000 00000000 00000000
I2C: ready
Model: Freescale Layerscape 2085a RDB Board
Board: LS2085A/LS2088A-RDB, Board Arch: V1, Board version: F, boot from vBank: 0
FPGA: v1.22
SERDES1 Reference : Clock1 = 156.25MHz Clock2 = 156.25MHz
SERDES2 Reference : Clock1 = 100MHz Clock2 = 100MHz
DRAM: Initializing DDR....using SPD
wait_for_sr_state: Arbitration lost sr=92 cr=0 state=2020
i2c_init_transfer: failed for chip 0x36 retry=0
wait_for_sr_state: Arbitration lost sr=92 cr=0 state=2020
i2c_init_transfer: failed for chip 0x36 retry=1
wait_for_sr_state: Arbitration lost sr=92 cr=0 state=2020
i2c_init_transfer: failed for chip 0x36 retry=2
i2c_init_transfer: give up i2c_regs=0x2000000
wait_for_sr_state: Arbitration lost sr=92 cr=0 state=2020
i2c_init_transfer: failed for chip 0x51 retry=0
wait_for_sr_state: Arbitration lost sr=92 cr=0 state=2020
i2c_init_transfer: failed for chip 0x51 retry=1
wait_for_sr_state: Arbitration lost sr=92 cr=0 state=2020
i2c_init_transfer: failed for chip 0x51 retry=2
i2c_init_transfer: give up i2c_regs=0x2000000
DDR: failed to read SPD from address 81
wait_for_sr_state: failed sr=a0 cr=0 state=2000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
i2c_imx_stop:trigger stop failed
i2c_init_transfer: failed for chip 0x36 retry=0
wait_for_sr_state: failed sr=a0 cr=0 state=2000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
i2c_imx_stop:trigger stop failed
i2c_init_transfer: failed for chip 0x36 retry=1
wait_for_sr_state: failed sr=a0 cr=0 state=2000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
i2c_imx_stop:trigger stop failed
i2c_init_transfer: failed for chip 0x36 retry=2
i2c_init_transfer: give up i2c_regs=0x2000000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
i2c_imx_stop:trigger stop failed
i2c_init_transfer: failed for chip 0x52 retry=0
wait_for_sr_state: failed sr=a0 cr=0 state=2000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
i2c_imx_stop:trigger stop failed
i2c_init_transfer: failed for chip 0x52 retry=1
wait_for_sr_state: failed sr=a0 cr=0 state=2000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
i2c_imx_stop:trigger stop failed
i2c_init_transfer: failed for chip 0x52 retry=2
i2c_init_transfer: give up i2c_regs=0x2000000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
i2c_imx_stop:trigger stop failed
i2c_init_transfer: failed for chip 0x36 retry=0
wait_for_sr_state: failed sr=a0 cr=0 state=2000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
i2c_imx_stop:trigger stop failed
i2c_init_transfer: failed for chip 0x36 retry=1
wait_for_sr_state: failed sr=a0 cr=0 state=2000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
i2c_imx_stop:trigger stop failed
i2c_init_transfer: failed for chip 0x36 retry=2
i2c_init_transfer: give up i2c_regs=0x2000000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
i2c_imx_stop:trigger stop failed
i2c_init_transfer: failed for chip 0x53 retry=0
wait_for_sr_state: failed sr=a0 cr=0 state=2000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
i2c_imx_stop:trigger stop failed
i2c_init_transfer: failed for chip 0x53 retry=1
wait_for_sr_state: failed sr=a0 cr=0 state=2000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
i2c_imx_stop:trigger stop failed
i2c_init_transfer: failed for chip 0x53 retry=2
i2c_init_transfer: give up i2c_regs=0x2000000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
i2c_imx_stop:trigger stop failed
i2c_init_transfer: failed for chip 0x36 retry=0
wait_for_sr_state: failed sr=a0 cr=0 state=2000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
i2c_imx_stop:trigger stop failed
i2c_init_transfer: failed for chip 0x36 retry=1
wait_for_sr_state: failed sr=a0 cr=0 state=2000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
i2c_imx_stop:trigger stop failed
i2c_init_transfer: failed for chip 0x36 retry=2
i2c_init_transfer: give up i2c_regs=0x2000000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
i2c_imx_stop:trigger stop failed
i2c_init_transfer: failed for chip 0x54 retry=0
wait_for_sr_state: failed sr=a0 cr=0 state=2000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
i2c_imx_stop:trigger stop failed
i2c_init_transfer: failed for chip 0x54 retry=1
wait_for_sr_state: failed sr=a0 cr=0 state=2000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
i2c_imx_stop:trigger stop failed
i2c_init_transfer: failed for chip 0x54 retry=2
i2c_init_transfer: give up i2c_regs=0x2000000
Error: No valid SPD detected.
DP-DDR: wait_for_sr_state: failed sr=a0 cr=0 state=2000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
i2c_imx_stop:trigger stop failed
i2c_init_transfer: failed for chip 0x36 retry=0
wait_for_sr_state: failed sr=a0 cr=0 state=2000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
i2c_imx_stop:trigger stop failed
i2c_init_transfer: failed for chip 0x36 retry=1
wait_for_sr_state: failed sr=a0 cr=0 state=2000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
i2c_imx_stop:trigger stop failed
i2c_init_transfer: failed for chip 0x36 retry=2
i2c_init_transfer: give up i2c_regs=0x2000000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
i2c_imx_stop:trigger stop failed
i2c_init_transfer: failed for chip 0x55 retry=0
wait_for_sr_state: failed sr=a0 cr=0 state=2000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
i2c_imx_stop:trigger stop failed
i2c_init_transfer: failed for chip 0x55 retry=1
wait_for_sr_state: failed sr=a0 cr=0 state=2000
wait_for_sr_state: failed sr=a0 cr=0 state=2000
i2c_imx_stop:trigger stop failed
i2c_init_transfer: failed for chip 0x55 retry=2
i2c_init_transfer: give up i2c_regs=0x2000000
Not detected16 EiB
DDR 16 EiB (DDR not enabled)

Outcomes