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MPC5746R eTPU requirement for IGF

Question asked by James Murray on Oct 12, 2017
Latest reply on Oct 18, 2017 by David Tosenovjan

It seems that eTPU2 inputs require that the Input Glitch Filter (IGF) is configured before they will work.

 

Is this mentioned in the MPC5746RRM ? I don't seem able to find it. Only by chance did I stumble upon this critical information in the 5634M - 5746R migration guide document.

 

It would be handy to have a code snippet showing the multiple configurations required to get an eTPU pin to actually be an input.

e.g.

MPC5634M code was simple:

SIU.PCR[114].R = 0x0503; /* Configure pad for primary eTPU_A[0] input and PU */

 

MPC5746R appears to require lots more if I'm understanding it correctly:

    SIUL2.MSCR0_255[39].R = 0x003d0000; /* Configure PC7 pad for primary eTPU_A[0] input and PU */
    SIUL2.MSCR512_995[576-512].R = 1; /* set as eTPU_A TCRCLK_A input */
    SIUL2.MSCR512_995[652-512].R = 1; /* PC7 -> IGF0 -> eTPU_A0 */

    /* Configure input glitch filter for crank and cam inputs as bypass */
    IGF.MCR.B.MDIS = 0;
    IGF.MCR.B.FGEN = 0;
    IGF.MCR.R = 0; /* set rising and falling to bypass */
    IGF.MCR.B.FGEN = 1; /* enable filter */

 

James

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