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i.MX6 FRC_MSR

Question asked by Toshishisa Sugiyama on Oct 10, 2017
Latest reply on Oct 11, 2017 by Toshishisa Sugiyama

Hi, @Mark Middleton 

 

I have a question about FRC_MSR bit in MMDCx_MPMUR0 in DDR3 calibration.

Is it neccesarry to set  FRC_MSR in DCD with specific order?

 

I confused below description.

 

1. I think this bit doesn't need to set when HW caliibration is used according to description of this bit below in refference manual.  

NOTE: This bit should be used only during manual (SW) calibration and not while the DDR is functional
(being accessed). After initial calibration is done the hardware performs periodic measurements
to track any operating conditions changes. Hence, force measurements (FRC_MSR) should not
be used. See Calibration Process for more information.

 

2.However, you mentioned it is in ddr calibration script and described as below.

https://community.nxp.com/docs/DOC-94790?commentID=11319#comment-11319 

There is a specific order that the parameters must be loaded, and it the order is not followed, then the MMDC will have problems. In general, the order goes:

- IOMUX pin settings.

- MMDC Calibration settings, including ZQ calibration, followed by setting the FRC_MSR bit.

- Loading the main MMDC register settings (and initializing the MMDC by turning it on as the last register loaded in this section)

- Configuring the MR registers of the attached LPDDR2 devices.

 

3. Calibration script also described below.

// Complete calibration by forced measurement:
setmem /32 0x021b08b8 = 0x00000800 // DDR_PHY_P0_MPMUR0, frc_msr
setmem /32 0x021b48b8 = 0x00000800 // DDR_PHY_P0_MPMUR0, frc_msr

What will complete?

What function is FRC_MSR?

 

Best Regards,

Sugiyama

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