KL46 SPI0 FIFO

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KL46 SPI0 FIFO

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eric_b
Contributor I

I've been working with a FRDM KL46Z and using SPI1 with the FIFO enabled. For my final application I will need to use SPI0 and I thought this would be an easy change with PE in KDS 3.2.0. However, PE does not let me select a HW buffer of 8 (FIFO enabled)  for SPI0. It says, "ERROR: The device doesn't support this setting!" I've reviewed the Reference Manual and I have not found anything indicating that this feature is not available for SPI0. Is there something I'm overlooking or is this a bug in PE?

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Robin_Shen
NXP TechSupport
NXP TechSupport

Hi Eric,

I am sorry to tell you that the SPI0 of KL46 does not 'include a 4-deep FIFO'.

SPI1 includes a 4-deep FIFO.png

Best Regards,

Robin

 

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