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i.MX6 Dual in 32-bit DDR3 configuration

Question asked by Rafael del Rey on Oct 6, 2017
Latest reply on Oct 6, 2017 by gusarambula



I need to redesign an i.MX6 Dual design, pursuing to lower costs with only 2 DDR3 ICs instead of 4 in the original design.


Due to cost reasons (my main target), this is cheaper than jumping to LP-DDR2 memories.


Also due to SW reasons, as far as I know, I need to stick to i.MX6 Dual device.


The question is: Can I leave DQ[32-64] and their respective DQS signals disconnected in order to use a true 32-bit memory bus in the i.MX6 Dual? or they (DQ[32-64]) should be terminated somehow (33 to 50 ohms Pullup or pulldown or whatever)?