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EEPROM programing and IRQ question

Question asked by Javier Vallori on Oct 2, 2017
Latest reply on Oct 5, 2017 by Carlos_Mendoza

Hi,

we have a product that do a EEPROM programing within the main App. The app runs on a LPC43S67, wich EEPROM operation access works via memory on the AHB bus. Beside the App uses CAN and SCT IRQs.

 

The user manual of the corresponding chip indicates the following:

 

"The erase/program cycle is triggered by
writing 0x6 to the CMD register. The page that is programmed is determined by the
address of the last AHB transfer. Therefore it is advised to perform a page write with
the page address and to prevent AHB reads between page register writes and the
erase/program trigger."

 

My question is, is it recommended to disable the IRQs during the EEPROM programing operation to avoid  within the IRQ a AHB transfer and wrongly change the "last AHB transfer address"? Or the "last AHB transfer address" is just referred to EEPROM's address range?

 

Thank you.

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