i.MX6SX and network

[Maddis]

Hi,

We have new i.MX6SX based custom HW. Everything else seems to be working ok, but I'm having hard time getting Ethernet working.

I'm running Linux 4.1.38 built using Yocto 2.2. We have LAN8720 PHY - chip. Linux is able to see the eth0 device and when the Ethernet link is up/down, but no data comes/goes ie. if I set static IP ping doesn't go through either way.

Here is the device tree how I configure here the pins and device

pinctrl_enet1: enet1grp {
fsl,pins = <
MX6SX_PAD_ENET1_MDC__ENET1_MDC 0x1b0d9
MX6SX_PAD_ENET1_MDIO__ENET1_MDIO 0x1b0d9
MX6SX_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x1b0d9

MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0 0x1b0d9
MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1 0x1b0d9
MX6SX_PAD_RGMII1_RXC__ENET1_RX_ER 0x1b0d9
MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x1b0d9
MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0 0x1b0d9
MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1 0x1b0d9
MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN 0x1b0d9
>;
};

&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet1>;
phy-mode = "rgmii";
phy-id = <0>;
status = "okay";
};

HW guy has measured the signals and said that they looked good so I'm assuming that pin config is 'close enough' for it to work.

I'm running out of ideas what could be wrong. Do I need to config driver/phy now differently since we only are using half the data lines in RGMII - bus? Wasn't able to find info about that.

[bernhardfink]

An ethernet system consists of the MAC block (inside i.MX) and the PHY (outside). Both of them must have a clock source for correct operation. I'm rather sure that you checked that there is a clock, but you can only measure this at the outside. You can't check if the internal block has a clock source. You can only make sure that there is an internal clock by programming it correctly :-)

Example:  

• your clock source comes from enetpll0 and is provided as clock for the PHY on pin ENET1_TX_CLK
• but this is not enough, this just provides a clock straight to the outside. The RMII i/f and the MAC block is not necessarily getting this clock as well.
• there is a setting in the pinmux registers which cause a feedback of this clock into the internal MAC block, in order to provide exactly this clock for the whole MAC logic. So even if this pin is configured as output, at the pin this signal is taken and is used as input for something else inside the chip
• watch out for the bit SION in the IOMUX register of the pin you used for the ref clock
• once you read the bit description it should get clearer

Hoping that this was the root cause for your problem.

[Maddis · Accepted solution]

I got this working. The problem was in the RGMII/RMII bus - configuration.

I changed this line

phy-mode = "rgmii";

to this

phy-mode = "rmii";

And network started working! Didn't catch that before.