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9s12x ram decode

Question asked by MICHAEL HUSLIG on Sep 16, 2017
Latest reply on Sep 19, 2017 by MICHAEL HUSLIG

Many years ago, I abandoned a project using an early 9s12xa512 uP.  Recently I have started a new project using the 9s12xe uP and porting a good chunk of the original code.  But I noticed a lot of the code is accessing the internal RAM using global instructions with GPAGE=0.  I no longer have the original uP reference manual for the 9s12xa, but I remember the code working back then.  The only explanation would be if somehow I knew that the internal RAM is replicated/duplicated as multiple images between 00_0000 and 0F_FFFF caused by incomplete decoding of the upper address lines.  Does anyone know if this is the case?

 

Mike Huslig

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