I am going through the IMX6 reference manual , INTC supports the 128 interrupts and it generates the wakeup signal to the CPU . My questions are as below :
Q1 : Is this INTC different from GIC?
Q2 Also , i could not see the GIC in the architecture block diagram of the reference manual . I would like to understand how the GIC is interfaced with the processor. Could you please help me understand this .