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KL28 clock distribution

Question asked by Martin Stankus on Sep 12, 2017
Latest reply on Sep 19, 2017 by Hui_Ma


I've got some questions regarding KL28 clock distribution subsystem. Please, can someone clarify the following?


1.) FIRC clock source has auto-trim feature. How is SCG_FIRCTCFG_TRIMDIV supposed to be set when SOSC is used as trim reference?


2.) RTC_CR contains SCxP load capacitor configuration bits and OSCE for oscillator control. SCG contains similar fields (SCG_SOSCCFG_SCxP and SCG_SOSCCSR_SOSCEN). How are RTC and SCG oscillator settings related?


3.) SCG_SOSCCSR contains SOSCERCLKEN bit that is described as "System OSC 3V ERCLK Enable" in refman rev. 4. What does "3V" means? Is this the same clock tree as ERCLK?


Thank you.


Best regards,