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I2C interrupt request

Question asked by Aditya Nagal on Sep 8, 2017
Latest reply on Sep 8, 2017 by igorpadykov

Hi ,

In the reference manual , table 3-1 , IRQ no 67 to 69 are for I2C devices . My question is , in case of I2C , CPU itself is the master and generates the clock for the slave device . All I2C transactions are initated by the I2C master only , then how come slave device will give the interrupt to the CPU . Please advice.

Regards,

Aditya Nagal

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