I am going through the IMX6 solo reference manual. In section 28.7 , I could see details of IRQ masking register , Status Register and control register . I could not see any details about Interrupt Priorities. My queries are below mentioned :
Q1. What if multiple interrupts come simultaneously on IRQ lines , how INTC will generate the wakeup signal then.
Q2. If CPU is serving interrupt from one resource , it is executing its ISR and at that time , if any other interrupt comes from another IRQ line , will it prempt the current execution of ISR and jump to serve another ?