R8 Always Set in C3

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R8 Always Set in C3

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jscottanderson
Contributor I

I'm using an FRDM-K66 board and running the freertos_uart example project from the SDK.  I want to use 9-bit mode and have set up a connection to my workstation over the SDA-hosted serial port which is called COM3 on my system.  The bit rate is 115200.  I've initialized UART0 on my FRDM board to use 9-bit mode by setting UART_C1_M_MASK (0x10) in register C1.  When I receive data I first read C3 for each data byte before reading the D register.  What I observe is that bit 7, the MSb in the register is always 1.

I've written a Python script that waits for any data on this port, reads it, then sends one byte with parity set to mark followed by three bytes with parity set to space.  What I expected is that the first byte would be accompanied by a set bit in C3[R8] and the next three would find a cleared bit in C3[R8].  I tried setting the parity to space and then to none using the Python script, but the result is the same.

Am I misunderstanding the use of this register?  Can anyone see what I am doing wrong here?

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danielchen
NXP TechSupport
NXP TechSupport

Hi Jeremy:

Please refer to the attached validation code for Kinetis, which already tested UART 9-bit data receive with parity enable, During the UART module validation, it use two UART modules to do 9-bit data transmit and receive. Please check the attached code for more details

Regards

Daniel


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