i.MX6ULL DDR calibration issues

[jsopenrb]

Hi, we have a custom board where i.MX6UL was previously used. We've replaced it with i.MX6ULL and cannot get LPDDR2 to work reliably. Stress test from DDR test tool passes, but using another stress test from Linux either shows memory errors or produces full system hang for most boards (some boards pass the test). U-boot configuration registers are the same as in the test tool script. Using lower DDR frequency does not help.

Script aid says that MMDC_MPPDCMPR2 register must be provided from calibration, but the calibration only provides values for MPRDDLCTL and MPWRDLCTL, so what value should we put into MMDC_MPPDCMPR2?

[jsopenrb]

Thanks, but the problem is that stress test fails if using calibrarion values from the test tool. Most boards produce very similar calibration values.

Also, I've noticed that EVK u-boot init file does not use default values for MMDC_MPPDCMPR2, so maybe it should be calibrated somehow as well?

[Yuri]

Hello,

 recommended value for MMDC_MPPDCMPR2  is 0x00470000

Regards,

Yuri.

[Yuri]

Hello,

1.

  You may use the following tools :

i.MX6ULL_DDR3_Script_Aid 

i.MX6ULL_LPDDR2_Script_Aid 

i.MX6UL_LPDDR2_Script_Aid 

 For MMDC_MPPDCMPR2   - default settings.

2.

  Please check if LPDDR2 configuration do not include multiple chip selects

and one ZQ resistor.

3.

  Please check PCB design :

- DQS signals should be 5 – 200 mils shorter than the clocks.
- Data and respective DQM signals should be 5 – 25 mils shorter than corresponding DQSs.
- Address and control signals should be 5 – 25 mils shorter than the clocks.
- Longest clock trace must be <= 3 inches.

4.

  Try overnight mode of the DDR Stress Test

i.MX6/7 DDR Stress Test Tool V2.70 

Have a great day,
Yuri

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