K60 ethernet trouble

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K60 ethernet trouble

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davidsherman
Senior Contributor I

I have been trying to get FreeRTOS TCP running on a K60 tower board with the TWR_SER module.  I've confirmed that the K60 is running off the 50 MHz clock from the TWR_SER board, and I can see 50MHz on the OSCERCLK if I route it to pin A11.  The RMII pins have been configured for the RMII, and I can read and write the PHY registers using the MDIO interface.

I have been using a FreeRTOS example (not using FreeRTOS TCP) as a guideline for the K60 ethernet, but I have one last hurdle.  I can't get it to receive or transmit.  I did have an issue with system bus errors due to the memory protection unit, but when I set TDAR or RDAR in the transmit or receive buffer descriptors, nothing appears to happen even though I have set the rxbd E bit and txbd R and L bits.  I was seeing the bus error when I set the TDAR bit, but now I see nothing in the EIR since I cleared the CESR VLD bit .  I have set the RMII_MODE bit in the RCR to put it in RMII mode, is there anything else that needs to be done?  I have the alignment set and FreeRTOS TCP has generated a DHCP request, but I never see the TXEN signal asserted that looks like it's attempting to transmit, the EIR doesn't indicate anything happened, and the buffer descriptors don't change at all, although TDAR and RDAR will clear themselves.

Any ideas?  It appears OSCERCLK is enabled to the ethernet module when the module is enabled, but is there some other clock gate I'm missing?

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mjbcswitzerland
Specialist V

Hi David

I have attached the Ethernet driver from the uTasker project which shows you how to configure and use the Ethernet controller (compatible with all Kinetis parts with Ethernet in MII, RMII, compatible or enhanced modes).
The complete project (including multi-homed TCP/IPv4/IPv6 stack) is on GITHUB: http://www.utasker.com/kinetis.html
You can also run it with Visual Studio, where the Kinetis Ethernet controller is simulated in real-time in case you need to study internal operations or identify differences with other code.
Operation with FreeRTOS is possible (http://www.utasker.com/forum/index.php?topic=1947.0).

Regards

Mark

P.S. Older K60s have some errata that need to be respected to use Ethernet reliably.

http://www.utasker.com/kinetis/TWR-K60N512.html
http://www.utasker.com/kinetis/TWR-K60D100M.html
http://www.utasker.com/kinetis/TWR-K60F120M.html

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davidsherman
Senior Contributor I

Hello Mark, thanks again, that was helpful.  It looks similar to other examples I've seen, although I was curious how you have the structure of KINETIS_FEC_BD defined, it does not appear to be defined in your attachment.  I ask because the Freescale fsl_enet library has the structure for the descriptor backwards from what the reference manual suggests.  It shows:

typedef struct _enet_tx_bd_struct

{

   uint16_t length;

   uint16_t control;

   uint8_t *buffer;

...

After some more fiddling, I did finally get it to transmit; it appears one of my routines was resetting the TDSR address while the module was enabled, apparently it didn't like that.  I did have one more question.  Your previous tip mentioned that the ECR_DBSWP bit can be set to make it little-endian, and it appears that it should work for legacy buffer descriptors as well as enhanced.  If it becomes little-endian, do the fields swap according to size only?  i.e., do the physical locations for status, length, and the pointer to the buffer stay the same, and only the order of the bytes change?

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mjbcswitzerland
Specialist V

David

If there are define that you are interested in they are all on GITHUB.

Beware that not all chips support ETHER_DBSWP (check the manual to your exact type to be sure), but if it is available it can be used to (slightly) improved efficiency in access.

It is a bit fiddle to explain all the ins and outs since not every detail changes (if you are writing a new driver you may need to experiment to get it all right) but most control bits in the buffer descriptors change location (eg. the empty buffer bit is 0x8000 in little-endian mode and 0x0080 in big-endian (the Ethernet controller originated in Coldfire devices). Also pointers need to be saved in the correct endian-ness. Just look at kinetis.h in the project to see the way that they change. The code has been used for about 12 years (Coldfire V2s) and adapted 6 years ago for Kinetis so can be considered mature.
The TCP/IP content doesn't change in any way, just the control buffers.

Regards

Mark

P.S. You must use the enhanced mode to be able to benefit from checksum offloading, which is what really improves performance! The uTasker project also allows multiple interfaces (such as multi-port switches, PPP, RNDIS, external Ethernet controllers) to be mixed with the internal once and still benefit from the enhanced mode features.

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