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MPC5777C: SIU_SRCR[SSR] change in 3N45H mask?

Question asked by Andrew Dennison on Aug 23, 2017
Latest reply on Aug 27, 2017 by Andrew Dennison

We use SIU_SRCR[SSR] to reset the processor: this works OK on 2N45H however does not appear to work on 3N45H.

The reference manual and errata don't mention anything, but I have two PCBs where the only hardware difference is the CPU mask and the PCB with the 3N45H does not reset correctly.

As an experiment I dragged out the debugger and tried to single step over the write to SSR:

On 2N45H the next instruction after the write to SSR is 0xfffffffc and execution continues as expected.

On 3N45H the P&E debugger reportes errors

Any ideas?