s12x bdm and tvs diode (tranzorb)

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s12x bdm and tvs diode (tranzorb)

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burra7
Contributor I
Hi,
I am in the final stages with my product using a s12x CPU. We are doing a lot of EMC tests on the product. I wonder if there is a recommended way to connect TVS diodes (tranzorb) to the BDM lines to protect against ESD.

ie

BDM
BDM VDD
BDM RESET

Br



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Lundin
Senior Contributor IV
It is worth noting that the 5V on the BDM isn't necessarily a supply voltage. Some BDM pods have the option to power up your application through this pin, others use it as a voltage reference to choose between 5V and 3.3V (or whatever voltage the app is using). As far as I know, this is BDM-pod specific.

The reset pin will not like too high capacitance. I don't know of S12X, but on the plain S12 devices a capacitance nearing 100nF will cause the mcu to freeze. For EMI purposes, a small capacitor on both the BDM and the reset line should suffice. 47pF and 100pF are common values.

Edit: Btw, does S12X come with built-in pull-up on the reset line? S12 lacked this, but I know that at least S08 has internal pull-up.

Message Edited by Lundin on 2008-09-22 10:43 AM
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kef
Specialist I
I don't think 100nF on /RESET pin causes MCU to freeze. But the same 100nF on /RESET pin makes COP and CME vectors being sort of redirected to main vector at 0xFFFE.
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burra77
Contributor I
Hi,
new revision of my schematic. I am a little unsure about the bas40-04 diode.   The Vrrm 40 might be to high.

BDM_ESD_protection_V3


Br,
Bertil
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bigmac
Specialist III
Hello Bertil,
 
I might have expected the lower external capacitance value to be connected to the BDM pin, and the higher value to the reset pin.  Keep in mind that the pair of schottky diodes are likely to provide about 20pF shunt capacitance.  I don't think you need any more.
 
For the reset pin, I would typically use an external pullup of 10k, and a shunt capacitance of 10nF.  This gives a time constant of 100us.  I shouldn't expect any POR issues with this delay.  Even using an internal pullup (say 30k-60k), the time constant would remain less than one millisecond.  What is the oscillator stabilization delay for the device you are using?
 
I am not sure why you have concern that the reverse breakdown voltage for the schottky diodes may be too high - if this is what you mean? 
 
There may also be some misunderstanding about what you are trying to protect against.  I don't think there will be any issue while the BDM lead is connected, since externally applied impedances will be relatively low.  The more susceptible situation would be when the BDM lead is disconnected, with the possibility that external electrostatic impulses may reach the pin(s).  However, I might also assume that the BDM header would not normally be exposed to the "outside world" during operation of the equipment, only during factory programming and test.  Other pins on the MCU, such as ADC inputs may be more susceptible to external interference, and may need more stringent protection measures.
 
Regards,
Mac
 
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Lundin
Senior Contributor IV
On my design I have serial resistors (with low resistance) on those lines to protect from ESD. It should be the only thing you need, because just as Bigmac says, the danger is when the BDM isn't connected and someone decides to go poke at the connector.

Also... doesn't the S12 come with internal diodes on those pins?

Message Edited by Lundin on 2008-09-22 04:59 PM
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bigmac
Specialist III
Hello Lundin,
 
Yes, the inputs do have internal diodes.  However, for the S12X and S12 the absolute maximum injection current limit is 25 mA, when applied to a single input only.  Beyond this level, destructive latchup may occur.  If the series resistance is a few hundred ohms, It does not take much of a voltage surge to exceed this level.  Thus my preference for the use of the Schottky diode approach, where any destructive current can be shunted away from the internal diodes.
 
Regards,
Mac
 
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burra77
Contributor I
Hi,
the biggest concern is ESD. If someone decides to poke with their finger on the pins. An other concern is ESD testing. The PCB is mounted in a BOPLA din-rail aluminum/plastic casing.

http://www.bopla.de/uploads/tx_commerce/mediando/P_Zeichnungen_PDF/87021050__2602098.pdf

The sides of the casing is plastic and the BSD port is located behind the plastic side. About 10mm from the the outer edge of the plastic side.

The ESD test is as follows:

Electrostatic discharge (ESD) test
Basis: IEC 61000-4-2
Test voltage: 8 kV Air
Test voltage: 6 kV Contact
No of spots: 10
No of discharges: 10 / polarity / spot
Interval between
discharges: 1 s
Severity level: 3
Performance test result: criterion B

My concern is if one tries to shoot 6kV on the plastic side directly outside the BDM port. This should not be able to latchup the CPU.

BDM_ESD_protection_v4

The reset pin is pulled high with a ds1811 and the crystal is a act753smx-4, -40 +105, 30ppm, cl=18pf, 16Mhz



Br,
Bertil






Message Edited by burra77 on 2008-09-23 07:31 AM
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bigmac
Specialist III
Hello Bertil,
 
Why is it necessary for the BDM plug to be permanently installed on the board?  For each production unit, the BDM connection needs to be present only for the very short interval needed to program the device.  If the BDM connections exist as holes in the PCB, with a temporary connection made duing programming, this should lessen the exposure of the connections to straying fingers, and increase the clearance distance for the high voltage tests.
 
Regards,
Mac
 
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burra77
Contributor I
Hi,
have now done some measurements on the BDM pin against ground.

bdm_wavefrom

probe C= 9.5pF

The peak to peak is as high as 5.89V

Maybe a TVS with 6V breakdown would be suitable?

Br,
Bertil




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burra77
Contributor I
Hi,
think a rail to rail ESD protection diode could do the job.

BDM_ESD_protection_v2


Could anybody comment?

Br,
Bertil
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bigmac
Specialist III
Hello Bertil,
 
With the polarity of the schottky diodes that you now show, you will cause a short circuit between +5 volts and ground.  Once you have reversed both diodes, the rail to rail clamp is necessary to prevent the possibility of exceeding the maximum voltage rating for the MCU.
 
Regards,
Mac
 
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burra77
Contributor I
Hi,
tried to make an picture of your proposal. Could you see if it is what you meant?

Then it's the components values.

TVS cap. <100pF ?
TVS voltage 5V?

Schottky speed??

BDM_ESD_protection.png


Br,
Bertil



Message Edited by burra77 on 2008-09-17 09:21 AM
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bigmac
Specialist III
Hello Bertil,
 
Actually, diode D2 would need to have its polarity reversed so that it would conduct for a positive spike.
 
The current rating for the schottky will depend on the severity of the disturbances, and whether a series resistor is fitted to limit the current surge.  A reverse capacitance of say 10pF would give a total additional shunt capacitance of 20pF - not sure whether this would still be too much.
 
The break-down voltage for the TVS would need to be less than the absolute maximum rating for the MCU, but should not conduct with the maximum Vdd normally applied to the MCU.
 
Regards,
Mac
 
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burra77
Contributor I
Ok,
I will put them in my design. I can always put 0R resistors if I have problem

Thanks,
Bertil


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bigmac
Specialist III
Hello BR,
 
You will need to consider the capacitance of the transorb device connected to the BDM pin, since the high speed data could be affected, and additional series resistance would likely exacerbate the issue. 
 
Another possibility might be to provide small, low capacitance Schottky diodes between the BDM pin and the Vdd and Vss rails.  The transorb could then be connected between Vdd and Vss, to limit voltage spikes occurring here, due to diode conduction.  The primary requirement is that the Schottky diodes should conduct prior to the internal intrinsic diodes at the pin, to minimize current in the internal diodes, and potential latchup.
 
Regards,
Mac
 
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JohnnyP
Contributor III
I installed 150 ohm series resistors at the BDM connector.
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