We're using i.MX6Q with EIM interfacing to an FPGA, using synch 16 bit none multiplexed mode with burst mode.
we use EIM_D0~EIM_D15 as DATA bus;
address and data bus work well except EIM_D6 and EIM_D7: when it pull down , it is hard to be pull up.
so if i want it to give a 101 level ,but it actually give me a level of 100.
why? is there some hardware problem?
The configuration of the pin is incorrect.
Hi jianmin
yes this may be hardware problem, please try to set these pads as
gpios and toggle them. May be useful to test board with jtag and baremetal test SDK:
Github SDK
https://github.com/backenklee/swp-report/tree/master/iMX6_Platform_SDK
Best regards
igor
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I have set these pads as gpios and toggle them,the first picture is the performence of EIM_D6 or EIM_D7,
The second picture is the performence of other EIM DATA pins .
I checked the hardware connetion,and there is nothing wrong.
is there any possible that the chip(mx6q) itself has something bug with EIM_D6 and EIM_D7? I tried some other imx6q chips,and got the same result. Can u help me ?
normal:
had you tried baremetal sdk example. Please try it, set eim with low frequency,
for example with 20MHz.
Best regards
igor