have some doubts on how mmu works for this cpu.
Testing now the linux kernel, in head.S mmu is enabled and then there is a jmp.
* Identity mapping for the kernel region.
movel #(MMUBASE+1),%d0 /* enable MMUBAR registers */
movel #MMUOR_CA,%d0 /* clear TLB entries */
movel #0,%d0 /* set ASID to 0 */
movel #MMUCR_EN,%d0 /* Enable the identity map */
nop /* sync i-pipeline */
movel #_vstart,%a0 /* jump to "virtual" space */
#endif /* CONFIG_MMU */
What is not clear is: i have a kernel loaded in 0x40001000 (so DDR2), and mmu get enabled here in the above code.
Ho can the same code already loaded in memory work (and seems it works, at leas on first kernel init parts) if it was build with load and entry at 0x40001000 ? I was expecting that after that mmu enabling, the addresses of code jumps are no more valid. Also, in init/main.c accessing to .data vars seems still working, and for .data also i was expecting addresses was converted from virtual to physical so .data init values was no more valid, unless they are not re-initialized later.
From the datahseet, what i understand is that addresses, if they don't match some important physical register address, are always translated to as virtual to physical.
Every light on this is welcome.