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lpc4330 static memory configuration

Question asked by 彦成 曹 on Aug 10, 2017
Latest reply on Aug 13, 2017 by 彦成 曹

How to configure an external static memory controller for lpc4330?I tried to write it, but I didn't succeed.The following is my configuration code,please advise

void Board_ExSram_Init(void)
{
IP_EMC_STATIC_CONFIG_T Static_EMC_Config;

LPC_CCU1->CLKCCU->CFG = (1 << 2) | (1 << 1) | 1;
while (!(LPC_CCU1->CLKCCU->STAT & 1));

if (SystemCoreClock < 80000000UL) {
LPC_SCU->EMCDELAYCLK = EMC_CLK_DLY_TIM_0; /* No EMC clock out delay */
}
else {
LPC_SCU->EMCDELAYCLK = EMC_CLK_DLY_TIM_2; /* 2.0 ns EMC clock out delay */
}
/*emc pin config*/
LPC_SCU->SFSP[1][0] = EMC_PIN_SET | 2; /* P1_0: A5 */
LPC_SCU->SFSP[1][1] = EMC_PIN_SET | 2; /* P1_1: A6 */
LPC_SCU->SFSP[1][2] = EMC_PIN_SET | 2; /* P1_2: A7 */
LPC_SCU->SFSP[1][3] = EMC_PIN_SET | 3; /* P1_3: OE */
LPC_SCU->SFSP[1][4] = EMC_PIN_SET | 3; /* P1_4: BLS0 */
LPC_SCU->SFSP[1][5] = EMC_PIN_SET | 3; /* P1_5: CS0 */
LPC_SCU->SFSP[1][6] = EMC_PIN_SET | 3; /* P1_6: WE */
LPC_SCU->SFSP[1][7] = EMC_PIN_SET | 3; /* P1_7: D0 */
LPC_SCU->SFSP[1][8] = EMC_PIN_SET | 3; /* P1_8: D1 */
LPC_SCU->SFSP[1][9] = EMC_PIN_SET | 3; /* P1_9: D2 */
LPC_SCU->SFSP[1][10] = EMC_PIN_SET | 3; /* P1_10: D3 */
LPC_SCU->SFSP[1][11] = EMC_PIN_SET | 3; /* P1_11: D4 */
LPC_SCU->SFSP[1][12] = EMC_PIN_SET | 3; /* P1_12: D5 */
LPC_SCU->SFSP[1][13] = EMC_PIN_SET | 3; /* P1_13: D6 */
LPC_SCU->SFSP[1][14] = EMC_PIN_SET | 3; /* P1_14: D7 */

LPC_SCU->SFSP[2][0] = EMC_PIN_SET | 2; /* P2_0: A13 */
LPC_SCU->SFSP[2][1] = EMC_PIN_SET | 2; /* P2_1: A12 */
LPC_SCU->SFSP[2][2] = EMC_PIN_SET | 2; /* P2_2: A11 */
LPC_SCU->SFSP[2][6] = EMC_PIN_SET | 2; /* P2_6: A10 */
LPC_SCU->SFSP[2][7] = EMC_PIN_SET | 3; /* P2_7: A9 */
LPC_SCU->SFSP[2][8] = EMC_PIN_SET | 3; /* P2_8: A8 */
LPC_SCU->SFSP[2][9] = EMC_PIN_SET | 3; /* P2_9: A0 */
LPC_SCU->SFSP[2][10] = EMC_PIN_SET | 3; /* P2_10: A1 */
LPC_SCU->SFSP[2][11] = EMC_PIN_SET | 3; /* P2_11: A2 */
LPC_SCU->SFSP[2][12] = EMC_PIN_SET | 3; /* P2_12: A3 */
LPC_SCU->SFSP[2][13] = EMC_PIN_SET | 3; /* P2_13: A4 */

LPC_SCU->SFSP[5][0] = EMC_PIN_SET | 2; /* P5_0: D12 */
LPC_SCU->SFSP[5][1] = EMC_PIN_SET | 2; /* P5_1: D13 */
LPC_SCU->SFSP[5][2] = EMC_PIN_SET | 2; /* P5_2: D14 */
LPC_SCU->SFSP[5][3] = EMC_PIN_SET | 2; /* P5_3: D15 */
LPC_SCU->SFSP[5][4] = EMC_PIN_SET | 2; /* P5_4: D8 */
LPC_SCU->SFSP[5][5] = EMC_PIN_SET | 2; /* P5_5: D9 */
LPC_SCU->SFSP[5][6] = EMC_PIN_SET | 2; /* P5_6: D10 */
LPC_SCU->SFSP[5][7] = EMC_PIN_SET | 2; /* P5_7: D11 */

LPC_SCU->SFSP[6][3] = EMC_PIN_SET | 3; /* P6_3: CS1 */
LPC_SCU->SFSP[6][6] = EMC_PIN_SET | 1; /* P6_6: BLS1 */

if (SystemCoreClock > 120000000UL) {
LPC_CREG->CREG6 |= (1 << 16);
(LPC_CCU1->CLKCCU[CLK_MX_EMC_DIV].CFG) |= (1 << 5);
}

/* Configure EMC clock-out pins */
LPC_SCU->SFSCLK[0] = EMC_PIN_SET | 0; /* CLK0 */

Static_EMC_Config.ChipSelect = 0;
Static_EMC_Config.Config = (1 < 1) | (1 < 19);
Static_EMC_Config.WaitOen = 0xf;
Static_EMC_Config.WaitPage = 0x1f;
Static_EMC_Config.WaitRd = 0x1f;
Static_EMC_Config.WaitTurn = 0xf;
Static_EMC_Config.WaitWen = 0x2;
Static_EMC_Config.WaitWr = 0x2;

Chip_EMC_Init(1, 0, 0);
Chip_EMC_Enable(1);
Chip_EMC_Static_Init(&Static_EMC_Config);
}

Outcomes