Problem with Initialize RAM

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

Problem with Initialize RAM

949 Views
mcmo
Contributor I

Hello,
I am using MPC5646C with S32 Design Studio for Power v1.2,
What configuration can make the RAM initialization time without clear operation,

Is the means, Mode Control Register (ME_MCTL):
TARGET_MODE = 0000 RESET (triggers a "functional" RESET event) 
or 

TARGET_MODE = 1111 RESET (triggers a ‘destructive’ reset event)

Reset after RAM keep reset before the value.

Regards

Jian

Tags (1)
0 Kudos
2 Replies

563 Views
martin_kovar
NXP Employee
NXP Employee

Hello Jian,

Asynchronous reset will possibly corrupt SRAM if it asserts during a read or write operation to SRAM.

The completion of that access depends on the cycle at which the reset occurs. Data read from or written to

SRAM before the reset event occurred is retained, and no other address locations are accessed or changed.

In case of no access ongoing when reset occurs, the SRAM corruption does not happen.

Instead, synchronous reset (SW reset) should be used in controlled function (without SRAM accesses) in

case an initialization procedure without SRAM initialization is needed.

If you perform functional reset using MC_ME module, content of the RAM will be preserved. If you use destructive reset, you should check the content of the RAM and in case there are some ECC errors for example, you should initialize RAM again.

Regards,

Martin

0 Kudos

563 Views
mcmo
Contributor I

Hello Martin,

Thank you for your reply, I spent another plan instead of this.But I don't know what did the code below to RAM,

;#***************************** Initialise SRAM ECC ***************************/
;# Store number of 128Byte (32GPRs) segments in Counter
e_lis r5, __SRAM_SIZE@h # Initialize r5 to size of SRAM (Bytes)
e_or2i r5, __SRAM_SIZE@l
e_srwi r5, r5, 0x7 # Divide SRAM size by 128
mtctr r5 # Move to counter for use with "bdnz"

;# Base Address of the internal SRAM
e_lis r5, __SRAM_BASE_ADDR@h
e_or2i r5, __SRAM_BASE_ADDR@l

;# Fill SRAM with writes of 32GPRs
sram_loop:
e_stmw r0,0(r5) # Write all 32 registers to SRAM
e_addi r5,r5,128 # Increment the RAM pointer to next 128bytes
e_bdnz sram_loop # Loop for all of SRAM

the code is in the startup.s file.

In my S32ds debugging, it seems that S32ds will initialize the RAM, I can't confirm whether this code reset the RAM.

Regards

Jian

0 Kudos