My customer and I are testing the LCDIF output with i.MX7D.
When the frequency is lowered, a phenomenon in which the image output by MIPI DSI is distorted has occurred.
Since we are changing only the frequency of DDR, we believe that the amount of data exchanged exceeds the amount of data that can be tolerated by DDR.
The DDR and the LCDIF are connected by AXI.
Do you have settings that make AXI transaction for LCDIF preferentially executed ?
My understanding is the highest priority in AXI transaction is image processing including LCDIF output.
Am I correct ?