AnsweredAssumed Answered

LPSPI Chip Select Frequency S32K144

Question asked by Vlad Damian on Jul 31, 2017


I am trying to understand some specs regarding SPI functionality on S32K144 processor.

First, I have opened and ran the LPSPI example provided. Then displayed my CHIP SELECT signal to the oscilloscope.

After configuring and checking all data transmited via SPI, I see that no matter what settings I do (related to the baudrate of transmission, BUS clock and other parameter changes), the CHIP select signal always waits between 20us-30us between two succesive transmissions. Other way said, The CHIP SELECT signal is HIGH, data is transmitted, then it goes LOW for aprox 20-30us, then the next data is transmitted.


This has anything to do with the SPI settings,  or there are some interrupts used by Operating System (OSIF) to do something else between two consecutive transmissions?

I have attached some pictures (please check  Δt value, at the bottom of graphic) 

Thank you!

SPI chip select


SPI chip select period 1

Original Attachment has been moved to: