Hi ,We have MPC8321 processor in PCI Agent mode with 33 MHz input clock,we are trying to achieve UCC UART communication with baud rate of 1200.Our BRGCLK is set to 83.33 MHz.Although in the BRGCx register the value of Clock divider is coming according to the 1200 baud rate we are not able to get the same baud rate when we measure on scope.So we hardcoded the clock divider value to maximum i.e 4096, we achieve a baud rate of 1250.We are able to achieve all other baud rates with same clock.
Formula used to calculate Clock Divider:
Async Baud Rate = BRGCLK or External Clock Source -----------------------------------------------------------------------------------------------------------------------------
( Prescale Divider ) • ( Clock Divider + 1 ) • ( Sampling Rate )
Have a great day,
I do not see your BRGCx[EXTC], BRGCx [DIV16], BRGCx[CD] and GUMR_L[TDCR] settings. . Maximum the BRGCLK to baud rate divider is 16*4096*32. For BRGCLK = 83.33MHz please check that BRGCx[EXTC]=0, BRGCx [DIV16]=1, BRGCx[CD]=270 and GUMR_L[TDCR]=0b10 (16x clock mode - normally chosen for UART). If it is possible please check also BRG output clock frequency on the corresponding BRGO pin for these settings.
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