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SIGTRAP with freertos hello world example on IMX7D Cortex M4

Question asked by Benoit Lepy on Jul 28, 2017
Latest reply on Jul 28, 2017 by Benoit Lepy

Hi,
To start developpement on IMX7D Cortex M4, I try to run freeRTOS hello world example. I'm working with KDS 3.2.0, to generate and debug this program. I use a JLink Pro probe connected to JTAG to debug.
My problem is a systematic sigtrap while executing "svc 0" line in prvPortStartFirstTask() called in vTaskStartScheduler().
I'm working in TCM memory with this Memory Configuration

Name             Origin                Length             Attributes
m_interrupts   0x1fff8000       0x00000240     xr
m_text            0x1fff8240       0x00007dc0      xr
m_data           0x20000000    0x00008000     rw
*default*          0x00000000    0xffffffff

I check vector table SVC_Handler address is correctly placed in this table and is coherent with the map file.
The MSP value read seems correct = 0x20007FFC
My breakpoint in SVC_Handler is not reached.
What's wrong? Does someone have an idea?
thanks!

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