Fatal security violation doesn't result in a transition to hard-fail

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Fatal security violation doesn't result in a transition to hard-fail

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ethanyang
Contributor II

Hi,

According to the "Security Reference Manual for the i.MX 6UltraLite Applications Processor" document, an occurrence of a fatal security violation should always result in a transition to the "soft-fail" state by the "System Security Monitor" (SSM). "Soft-fail" is the state which SSM generates a security interrupt and the fail state indication output, which is treated as a security violation by other modules.

 

By enabling "high assurance" configuration, the processor can even go to "hard-fail" state that triggers a hard reset request output, which should be used in the system to perform a hardware reset without the aid of software. SSM transitions from "soft-fail" to the "hard-fail" state is based on a count down. If enabled, the transition should occur when the value in "HAC counter" counts down to zero.

 

But, after setting these configurations and asserting a fatal-software violation we couldn't observe the automatic system reset in "hard-fail" state with the latest iMX6UL chip. It was observed on the older revision of iMX6UL chip.

Are the latest i.MX6UL supposed to act like the previous revision of it? If not, is there an update of SRM for the latest i.MX6UL?

Thanks,

Ethan

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Yuri
NXP Employee
NXP Employee

   Sorry, but the information you are requesting is treated as confidential info at this time. 

Naturally, we cannot discuss this with you in public anyway, this requires to be handled as

a Service Request (SR, case).

 

 

Have a great day,
Yuri

 

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