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Power Down Cycle

Question asked by Daniel Minors on Jul 27, 2017
Latest reply on Jul 28, 2017 by alexander.yakovlev

In the datasheet  P1011EC, P1011 QorIQ Integrated Processor Hardware Specification section 2.3 Power Down Requirements it states;

"The power-down cycle must complete such that power supply values are below 0.4 V before a new power-up cycle can be started."

Is this true for all the power rails or just the Core and platform supply voltage and PLL supply?