1. Since HW I2C Interface is limited in LPC1830, Qisda need SW I2C to simulate I2C Master.
2. I can use LPC1857 to simulate 100KHz I2C. But it becomes 7Khz I2C Master and cause I2C device has no ACK response.
3. LPC1830 need to fetch code from QSPI. That’s reason why it causes more time for GPIO Transaction for simulating I2C.
4. I look forum and try to solve this by relocate SW I2C Source into SRAM for faster speed.
I have seem the related Q&A for this link
But it relocate all ISR into SRAM. I think my SRAM will full since my code is quiet huge.
Do you give me suggestion how to relocate partial code into SRAM right all ISR and functions.